VLSI CAD Automation & DevOps Engineer

What will your job look like:

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Flow & CI/CD Automation
• Automate RTL lint, CDC/RDC, synthesis checks (front‑end only), and UVM regression flows.
• Build and maintain CI/CD pipelines (Jenkins/GitLab CI) for simulation, coverage collection, and sign‑off checks.
• Implement pre‑submit checks (lint, CDC) and nightly regressions with dashboards for pass/fail and coverage metrics.
EDA Tooling & CAD Enablement
• Manage and integrate front‑end EDA tools (e.g., VCS, Xcelium, Questa, SpyGlass).Develop scripts to parse logs/reports (lint, CDC, coverage, simulation) and generate actionable summaries.
• Maintain PDK-independent front‑end tool configurations and flow reproducibility.
Compute  & Licensing
• Operate and optimize compute farm schedulers (LSF/SLURM/Grid Engine) for simulation and regression jobs.
• Monitor and tune license usage for front‑end tools (FlexLM/Lmx), ensuring high availability and efficiency.
Observability & Support
• Build dashboards for regression health, coverage trends, and farm/license utilization.
• Troubleshoot flow failures, triage environment vs. design issues, and publish runbooks for common problems.

All you need is:

• Minimum of 7 years of proven experience in VLSI CAD
• Strong Linux fundamentals; scripting in Python, Tcl, and shell.
• Hands-on with CI/CD (Jenkins/GitLab) for hardware verification flows.
• Experience with EDA tools for RTL and DV (Synopsys VCS, Cadence Xcelium, Siemens Questa, SpyGlass).
• Familiarity with compute schedulers and license servers.
• Source control expertise (Git or Perforce) and automation for code reviews.
• UVM methodology and coverage analysis experience - an advantage.
• Containers for EDA (Docker/Apptainer) and observability stacks (Grafana/ELK )-an advantage.
• Exposure to hybrid HPC or cloud bursting for simulation workloads -an advantage.